xiaolabaDIY 的部落格

This is initial test for the bare broad programmer. it is simple but effective and ready available with the lowest cost for Bill Of Material (BOM). However, few notices are attention to this process during development and test.

1) to include pull up resistors (100K Ohm) for every I/O, more robustness;

2) to include bypass capacitors (4u7/16V & 0.1u) to the power rail, more robustness and to improve the power surege;

3) Set the LPT port to base address of 0x378 other than IBM T43 default 0x3BC;

4) the 5V supply is optional but it aims to reduce the loading of LPT port because most notebook has tri-state LPT port of which is not supply rated current;

5) Host PC is running with software PonyPro, it can be free for download or search the Google on who's own accord. The combination of this host software & the hardware interface of this bare broad, it results the selection from the manu bar [SETUP] -> [Interface Setup] -> [AVR ISP I/O]

 

this vidoe clip is a visual memory for the process in case any future development activity. At the mean time, any parallel port monitor can be used to display the voltage change once the host software access the LPT I/O pin, the voltage change can be displayed for logic level indication. of course, such a parallel port monitor program is optional if logic analyser or OSC scope is equipped by the professional. Again, the program of parallel port monitor is no cost at all and should be free to download. 

http://hk.video.yahoo.com/video/video.html?id=891840